1. Field of the Invention
This invention relates to an improvement in the method of producing integrated circuit structures containing both CMOS and bipolar devices. More particularly, this invention relates to an improved method for isolating adjacent CMOS and bipolar devices in an integrated circuit structure.
2. Description of the Prior Art
In the production of CMOS devices, it is conventional to isolate the p-channel from the adjoining n-channel using a channel stop implant. Self aligned techniques for this channel stop require introducing the dopants prior to field oxidation. However, the heat required to subsequently grow the field oxide over the doped channel stop results in diffusion of the dopant into other areas of the device including the channel. As a result of this diffusion, the usual implant dosage is generally required to be 2-3 times the amount remaining in the channel stop after the growth of the field oxide to insure that an adequate impurity concentration remains in the channel stop area after the diffusion.
Isolation of bipolar devices from adjoining devices is also necessary. This is conventionally accomplished using implantation or pre-deposition followed by diffusion of impurities and thermal oxidation to form an isolation region between the devices.
As shown in FIG. 1, previous formation of an isolation region adjacent a bipolar device by implantation of impurities required use of the additional mask shown at A during growth of the field oxide B between adjacent devices to form an opening in the field oxide for doping the substrate after removal of the mask.
If an integrated circuit structure contains both CMOS and bipolar devices, formation of the isolation regions by prior art methods can involve implantation or diffusion of the channel stops in the CMOS device prior to oxide growth, and then subsequent mask removal and implantation or diffusion of the substrate in the bipolar area after growth of the field oxide.
In an article entitled "Scaleable Retrograde P-Well CMOS Technology", published in IEDM 81 of the IEEE at pages 346-349, Stephen R. Combs describes a retrograde p-well CMOS technology utilizing a single high energy boron implant to produce both the p-well and the channel stops after growth of the field oxide. The retrograde implant penetrates the field oxide resulting in a high charge density localized directly below the field oxide. Since the field oxide is already grown and the structure is usually not exposed to further major heating, diffusion of the p-well and channel stop impurities is reduced or eliminated by this technique. This results in a retrograde well profile as well as an abrupt channel stop profile. This results in high packing density and good latch-up protection.
It would, however, be desirable to provide for the formation, in a single step, of p-wells, and isolation regions between active devices in an integrated circuit structure containing both CMOS and bipolar devices.